Reduced Overshoots, Oscillations, and $dV/dt$ Generation in Parallel Connected SiC MOSFET Modules With Optional Active Current Balancing

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dc.catalogadorjlo
dc.contributor.authorParker, Mason
dc.contributor.authorNeira Castillo, Sebastián Felipe
dc.contributor.authorHorsley, Edward L.
dc.contributor.authorFinney, Stephen
dc.contributor.authorJudge, Paul D.
dc.date.accessioned2025-03-19T13:28:38Z
dc.date.available2025-03-19T13:28:38Z
dc.date.issued2025
dc.format.extent16 páginas
dc.fuente.origenORCID
dc.identifier.doi10.1109/TPEL.2024.3453438
dc.identifier.urihttps://doi.org/10.1109/TPEL.2024.3453438
dc.identifier.urihttps://repositorio.uc.cl/handle/11534/102794
dc.information.autorucEscuela de Ingeniería; Neira Castillo, Sebastián Felipe; 0000-0001-6411-5892; 203320
dc.issue.numero1
dc.language.isoen
dc.nota.accesocontenido parcial
dc.revistaIEEE Transactions on Power Electronics
dc.rightsacceso restringido
dc.subjectActive gate driver
dc.subjectCurrent sharing
dc.subjectElectromagnetic interference (EMI)
dc.subjectHalf bridge module
dc.subject.ddc600
dc.subject.deweyTecnologíaes_ES
dc.subject.ods09 Industry, innovation and infrastructure
dc.subject.odspa09 Industria, innovación e infraestructura
dc.titleReduced Overshoots, Oscillations, and $dV/dt$ Generation in Parallel Connected SiC MOSFET Modules With Optional Active Current Balancing
dc.typeartículo
dc.volumen40
sipa.codpersvinculados203320
sipa.trazabilidadORCID;2025-03-03
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